The work in computer-aided design is divided into two groups. The high-level synthesis group is investigating issues in mapping behavioral specifications to register transfer level representations. Of particular interest are the application areas of fault-tolerance and testing. How to incorporate detection and recovery in microarchitecture synthesis, and effective incorporation of built-in self-test structures during high-level synthesis are being researched. An interactive framework for high-level synthesis is being developed. Flow-graph restructuring techniques during synthesis provide an efficient method for exploring the design space. Algorithms such as edge-based scheduling, multi-dimensional force-directed scheduling and integer linear programming formulations are being investigated for synthesis.